cds9k - Linux kernel driver for the CDS9K FPGA/CPLD (demo purposes)

	Commit message (Collapse)	Author	Age
*	Add reset block to sample DTS	David Phillips	2021-05-16
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*	Add reset driver and consumer for debugging it	David Phillips	2021-05-16
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*	Add maximum register	David Phillips	2021-05-09
\| \| \| \|	This allows debug through debugfs
*	Add sample DTS	David Phillips	2021-05-09
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*	Add driver for PWM LED block	David Phillips	2021-05-09
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*	Update GPIO driver ngpio	David Phillips	2021-05-09
\| \| \| \|	I forgot to raise this to 16 when the register size was also bumped to 16-bit.
*	Remove debug printks	David Phillips	2021-05-09
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*	Rename top-level CDS9K regmap driver	David Phillips	2021-05-09
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*	Adjust regmap settings	David Phillips	2021-05-09
\| \| \| \| \| \|	The CDS9K has been changed to use an 8-bit pad between the register and value, and 16-bit values. The driver should be renamed at some point too, as this is less of a "simple MFD", but tailored to CDS9K protocol.
*	Add driver for CDS9K GPIO IP block	David Phillips	2021-05-09
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*	Initial	David Phillips	2021-05-01