From 9026a7e5c0f16bde1c0826dc95158c6e03795905 Mon Sep 17 00:00:00 2001
From: David Phillips <david@sighup.nz>
Date: Thu, 28 Dec 2017 16:06:01 +1300
Subject: Rough-out logic gate wiring

---
 adder.lg | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

(limited to 'adder.lg')

diff --git a/adder.lg b/adder.lg
index a883081..f751a3b 100644
--- a/adder.lg
+++ b/adder.lg
@@ -1,9 +1,7 @@
 module adder
 
-node input a
-node input b
-node output r0
-node output r1
+input a
+input b
 
 expr r0: xor a b
 expr r1: and a b
-- 
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